List the predefine software interrupts available in 8086.
Software
Interrupts: Some instructions are inserted at the
desired position into the program to create interrupts. These interrupt
instructions can be used to test the working of various interrupt handlers. It
includes:
INT
- Interrupt instruction with type number: It is 2-byte
instruction First byte provides the op-code and the second byte provides the
interrupt type number. There are 256 interrupt types under this group its
execution includes the following steps –
·
Flag register value is pushed on to the
stack.
·
CS value of the return address and IP
value of the return address are pushed on to the stack.
·
IP is loaded from the contents of the word
location type number × 4
·
CS is loaded from the contents of the next
word location.
·
Interrupt Flag and Trap Flag are reset to
0
The starting address for type 0
interrupt is 000000H, for type 1 interrupt is 00004H similarly for type 2 is
00008H and ... so on. The first five pointers are dedicated interrupt pointers.
i.e. –
·
TYPE
0:
interrupt represents division by zero situation.
·
TYPE
1:
interrupt represents single step execution during the debugging of a program.
·
TYPE
2:
interrupt represents non-mask able NMI interrupt.
·
TYPE
3:
interrupt represents break-point interrupt.
·
TYPE
4:
interrupt represents overflow interrupt.
The interrupts from Type 5 to Type 31
are reserved for other advanced microprocessors, and interrupts from 32 to Type
255 are available for hardware and software interrupts.
INT
3-Break Point Interrupt Instruction: It is a 1-byte
instruction having op-code is CCH. These instructions are inserted into the
program so that when the processor reaches there, then it stops the normal
execution of program and follows the break-point procedure. Its execution
includes the following steps -
·
Flag register value is pushed on to the
stack.
·
CS value of the return address and IP
value of the return address are pushed on to the stack.
·
IP is loaded from the contents of the word
location 3 × 4 = 0000CH
·
CS is loaded from the contents of the next
word location.
·
Interrupt Flag and Trap Flag are reset to
0
INTO
- Interrupt on overflow instruction: It is a 1-byte
instruction and their mnemonic INTO. The op-code for this instruction is CEH.
As the name suggests it is a conditional interrupt instruction, i.e. it is
active only when the overflow flag is set to 1 and branches to the interrupt
handler whose interrupt type number is 4. If the overflow flag is reset then,
the execution continues to the next instruction.
Its execution includes the following
steps –
·
Flag register values are pushed on to the
stack.
·
CS value of the return address and IP
value of the return address are pushed on to the stack.
·
IP is loaded from the contents of word
location 4 × 4 = 00010H
·
CS is loaded from the contents of the next
word location.
·
Interrupt flag and Trap flag are reset to
0.
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